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timers the mc1455 monolithic timing circuit is a highly stable controller capable of producing accurate time delays or oscillation. additional terminals are provided for triggering or resetting if desired. in the time delay mode, time is precisely controlled by one external resistor and capacitor. for astable operation as an oscillator, the freerunning frequency and the duty cycle are both accurately controlled with two external resistors and one capacitor. the circuit may be triggered and reset on falling waveforms, and the output structure can source or sink up to 200 ma or drive mttl circuits. ? direct replacement for ne555 timers ? timing from microseconds through hours ? operates in both astable and monostable modes ? adjustable duty cycle ? high current output can source or sink 200 ma ? output can drive mttl ? temperature stability of 0.005% per c ? normally on or normally off output on semiconductor ? semiconductor components industries, llc, 2002 january, 2002 rev. 6 1 publication order number: mc1455/d device operating temperature range package mc1455, mc1455b semiconductor technical data timing circuit ordering information mc1455p1 mc1455d t a = 0 to +70 c t a = 40 to +85 c plastic dip so8 p1 suffix plastic package case 626 1 8 d suffix plastic package case 751 (so8) 8 1 mc1455bd so8 mc1455bp1 plastic dip figure 1. 22 second solid state time delay relay circuit figure 2. representative block diagram figure 3. general test circuit 1.0 k load mt2 10 k 0.1 m f 0.01 m f 1 5 2 4 38 6 7 1.0 m f c 20m g mt1 -10 v 1n4003 117 vac/60 hz 1n4740 3.5 k 250 v - + t = 1.1; r and c = 22 sec time delay (t) is variable by changing r and c (see figure 16). 10 m f v cc threshold control voltage trigger 6 5 2 5 k 8 5 k 5 k + - comp a + - comp b 1 gnd reset 4 r s flip flop q inhibit/ reset 7 3 discharge output r mc1455 v r reset 4 8 i cc v cc 700 discharge 6 threshold 7 i th 2.0 k v s trigger 2 gnd 1 3 i sink i source v o 0.01 m f + 5 control voltage output v cc mc1455 test circuit for measuring dc parameters (to set output and measure parameters): a) when v s 2/3 v cc , v o is low. b) when v s 1/3 v cc , v o is high. c) when v o is low, pin 7 sinks current. to test for reset, set v o c) high, apply reset voltage, and test for current flowing into pin 7. c) when reset is not in use, it should be tied to v cc .
mc1455, mc1455b http://onsemi.com 2 maximum ratings (t a = +25 c, unless otherwise noted.) rating symbol value unit power supply voltage v cc +18 vdc discharge current (pin 7) i 7 200 ma power dissipation (package limitation) p1 suffix, plastic package derate above t a = +25 c d suffix, plastic package derate above t a = +25 c p d p d 625 5.0 625 160 mw mw/ c mw c/w operating temperature range (ambient) mc1455b mc1455 t a 40 to +85 0 to +70 c storage temperature range t stg 65 to +150 c electrical characteristics (t a = +25 c, v cc = +5.0 v to +15 v, unless otherwise noted.) characteristics symbol min typ max unit operating supply voltage range v cc 4.5 16 v supply current v cc = 5.0 v, r l = v cc = 15 v, r l = , low state (note 1) i cc 3.0 10 6.0 15 ma timing error (r = 1.0 k w to 100 k w) (note 2) initial accuracy c = 0.1 m f drift with temperature drift with supply voltage 1.0 50 0.1 % ppm/ c %/v threshold voltage/supply voltage v th /v cc 2/3 trigger voltage v cc = 15 v v cc = 5.0 v v t 5.0 1.67 v trigger current i t 0.5 m a reset voltage v r 0.4 0.7 1.0 v reset current i r 0.1 ma threshold current (note 3) i th 0.1 0.25 m a discharge leakage current (pin 7) i dischg 100 na control voltage level v cc = 15 v v cc = 5.0 v v cl 9.0 2.6 10 3.33 11 4.0 v output voltage low i sink = 10 ma (v cc = 15 v) i sink = 50 ma (v cc = 15 v) i sink = 100 ma (v cc = 15 v) i sink = 200 ma (v cc = 15 v) i sink = 8.0 ma (v cc = 5.0 v) i sink = 5.0 ma (v cc = 5.0 v) v ol 0.1 0.4 2.0 2.5 0.25 0.25 0.75 2.5 0.35 v output voltage high v cc = 15 v (i source = 200 ma) v cc = 15 v (i source = 100 ma) v cc = 5.0 v (i source = 100 ma) v oh 12.75 2.75 12.5 13.3 3.3 v rise time differential output t r 100 ns fall time differential output t f 100 ns notes: 1. supply current when output is high is typically 1.0 ma less. 2. tested at v cc = 5.0 v and v cc = 15 v monostable mode. 3. this will determine the maximum value of r a + r b for 15 v operation. the maximum total r = 20 m w .
mc1455, mc1455b http://onsemi.com 3 i sink (ma) i sink (ma) v cc , supply voltage (vdc) i sink (ma) i source (ma) figure 4. trigger pulse width v t(min) , minimum trigger voltage (x v cc = vdc) figure 5. supply current figure 6. high output voltage figure 7. low output voltage @ v cc = 5.0 vdc figure 8. low output voltage @ v cc = 10 vdc figure 9. low output voltage @ v cc = 15 vdc 0.4 150 125 100 75 50 25 0 pw, pulse width (ns min) i cc , supply current (ma) 1.0 1.0 v cc -v oh (vdc) v ol , low output voltage (vdc) 0.3 0.2 0.1 0 25 c 0 c 70 c v ol , low output voltage (vdc) v ol , low output voltage (vdc) 25 c 10 8.0 6.0 4.0 2.0 0 15 5.0 10 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 2.0 5.0 10 20 50 100 25 c 5.0 v v cc 15 v 10 1.0 0.1 0.01 1.0 2.0 5.0 10 20 50 100 25 c 2.0 5.0 10 20 50 100 10 1.0 0.1 0.01 25 c 1.0 2.0 5.0 10 20 50 100 10 1.0 0.1 0.01 25 c
mc1455, mc1455b http://onsemi.com 4 t a , ambient temperature ( c) figure 10. delay time versus supply voltage v cc , supply voltage (vdc) figure 11. delay time versus temperature figure 12. propagation delay versus trigger voltage 5.0 0 v t(min) , minimum trigger voltage (x v cc = vdc) t d , delay time normalized t d , delay time normalized , propagation delay time (ns) t pd 1.015 1.010 1.005 1.000 0.995 0.990 0.985 01015 10 20 1.015 1.010 1.005 1.000 0.995 0.990 0.985 -75 -50 -25 0 25 50 75 100 125 300 250 200 150 100 50 0 0.1 0.2 0.3 0.4 0 c 25 c 70 c
mc1455, mc1455b http://onsemi.com 5 figure 13. representative circuit schematic 100 threshold comparator trigger comparator flip-flop output v cc threshold trigger reset discharge gnd discharge reset 100 k 5.0 k 5.0 k e 4.7 k c b 7.0 k 6.8 k 3.9 k b 220 4.7 k output control voltage 5.0 k 1.0 k 4.7 k 830 4.7k 10 k c general operation the mc1455 is a monolithic timing circuit which uses an external resistor capacitor network as its timing element. it can be used in both the monostable (oneshot) and astable modes with frequency and duty cycle controlled by the capacitor and resistor values. while the timing is dependent upon the external passive components, the monolithic circuit provides the starting circuit, voltage comparison and other functions needed for a complete timing circuit. internal to the integrated circuit are two comparators, one for the input signal and the other for capacitor voltage; also a flipflop and digital output are included. the comparator reference voltages are always a fixed ratio of the supply voltage thus providing output timing independent of supply voltage. monostable mode in the monostable mode, a capacitor and a single resistor are used for the timing network. both the threshold terminal and the discharge transistor terminal are connected together in this mode (refer to circuit in figure 14). when the input voltage to the trigger comparator falls below 1/3 v cc , the comparator output triggers the flipflop so that its output sets low. this turns the capacitor discharge transistor aoffo and drives the digital output to the high state. this condition allows the capacitor to charge at an exponential rate which is set by the rc time constant. when the capacitor voltage reaches 2/3 v cc , the threshold comparator resets the flipflop. this action discharges the timing capacitor and returns the digital output to the low state. once the flipflop has been triggered by an input signal, it cannot be retriggered until the present timing period has been completed. the time that the output is high is given by the equation t = 1.1 r a c. various combinations of r and c and their associated times are shown in figure 16. the trigger pulse width must be less than the timing period. a reset pin is provided to discharge the capacitor, thus interrupting the timing cycle. as long as the reset pin is low, the capacitor discharge transistor is turned aono and prevents the capacitor from charging. while the reset voltage is applied the digital output will remain the same. the reset pin should be tied to the supply voltage when not in use. figure 14. monostable circuit r l +v cc (5.0 v to 15 v) reset v cc 8 discharge 7 6 5 threshold control voltage 0.01 m f 1 2 trigger output 3 4 r a r l mc1455 c
mc1455, mc1455b http://onsemi.com 6 c, capacitance ( f) m figure 15. monostable waveforms figure 16. time delay figure 17. astable circuit figure 18. astable waveforms (r a = 10 k w , c = 0.01 m f, r l = 1.0 k w , v cc = 15 v) (r a = 5.1 k w , c = 0.01 m f, r l = 1.0 k w ; r b = 3.9 k w , v cc = 15 v) t = 20 m s/cm t = 50 m s/cm 100 10 1.0 0.1 0.01 0.001 10 m s 100 m s 1.0 ms 10 ms 100 ms 1.0 10 100 t d , time delay (s) r l +v cc (5.0 v to 15 v) reset v cc 8 7discharge 6threshold 5 control voltage 1 2 trigger output 3 4 r a r l mc1455 c r b astable mode in the astable mode the timer is connected so that it will retrigger itself and cause the capacitor voltage to oscillate between 1/3 v cc and 2/3 v cc . see figure 17. the external capacitor changes to 2/3 v cc through r a and r b and discharges to 1/3 v cc through r b . by varying the ratio of these resistors the duty cycle can be varied. the charge and discharge times are independent of the supply voltage. the charge time (output high) is given by: t 1 = 0.695 (r a + r b) c the discharge time (output low) is given by: t 2 = 0.695 (r b ) c thus the total period is given by: t = t 1 + t 2 = 0.695 (r a +2r b) c t the frequency of oscillation is then: 1 = 1.44 (r a +2r b ) c f = and may be easily found as shown in figure 19. the duty cycle is given by: r a +2r b r b dc = to obtain the maximum duty cycle r a must be as small as possible; but it must also be large enough to limit the discharge current (pin 7 current) within the maximum rating of the discharge transistor (200 ma). the minimum value of r a is given by: r a v cc (vdc) i7 (a) v cc (vdc) 0.2 figure 19. free running frequency c, capacitance ( f) m 100 10 1.0 0.1 0.01 0.001 (r a + 2 r b ) 0.1 1.0 10 100 1.0 k 10 k 100 f, free running frequency (hz)
mc1455, mc1455b http://onsemi.com 7 applications information linear voltage ramp in the monostable mode, the resistor can be replaced by a constant current source to provide a linear ramp voltage. the capacitor still charges from 0 v cc to 2/3 v cc . the linear ramp time is given by: t = 2 3 v cc 1 , where i = v cc v b v be r e if v b is much larger than v be , then t can be made independent of v cc . missing pulse detector the timer can be used to produce an output when an input pulse fails to occur within the delay of the timer. to accomplish this, set the time delay to be slightly longer than the time between successive input pulses. the timing cycle is then continuously reset by the input pulse train until a change in frequency or a missing pulse allows completion of the timing cycle, causing a change in the output level. figure 20. linear voltage sweep circuit figure 21. missing pulse detector figure 22. linear voltage ramp waveforms figure 23. missing pulse detector waveforms discharge threshold v cc reset 4 3 digital output 2 trigger 1 mc1455 8v cc r e r1 2n4403 or equiv v b r2 c 7 6 5 sweep output 0.01 m f control voltage +v cc (5.0 v to 15 v) reset r l v cc r a 7 6 5 control voltage 0.01 m f 1 trigger input output 48 c 2n4403 or equiv mc1455 t = 100 m s/cm v e 3 2 t = 500 m s/cm (r e = 10 k w , r2 = 100 k w , r1 = 39 k w , c = 0.01 m f, v cc = 15 v) (r a = 2.0 k w , r l = 1.0 k w , c = 0.01 m f, v cc = 15 v) i
mc1455, mc1455b http://onsemi.com 8 pulse width modulation if the timer is triggered with a continuous pulse train in the monstable mode of operation, the charge time of the capacitor can be varied by changing the control voltage at pin 5. in this manner, the output pulse width can be modulated by applying a modulating signal that controls the threshold voltage. figure 24. pulse width modulator +v cc (5.0 v to 15 v) r l output clock input modulation input c 7 6 5 r a 48 3 2 1 mc1455 t = 0.5 ms/cm (r a = 10 k w , c = 0.02 m f, v cc = 15 v) figure 25. pulse width modulation waveforms test sequences several timers can be connected to drive each other for sequential timing. an example is shown in figure 26 where the sequence is started by triggering the first timer which runs for 10 ms. the output then switches low momentarily and starts the second timer which runs for 50 ms and so forth. figure 26. sequential timer load mc1455 6 7 2 84 5 3 27 k 1 5.0 m f load mc1455 9.1 k 6 7 1.0 m f 2 84 5 3 0.01 m f 27 k 1 0.001 m f 5.0 m f mc1455 6 7 2 84 5 3 1 load 0.001 m f 18.2 k 9.1 k 0.01 m f 0.01 m f v cc (5.0 v to 15 v)
mc1455, mc1455b http://onsemi.com 9 package dimensions p1 suffix plastic package case 62605 issue l notes: 1. dimension l to center of lead when formed parallel. 2. package contour optional (round or square corners). 3. dimensioning and tolerancing per ansi y14.5m, 1982. 14 5 8 f note 2 a b t seating plane h j g d k n c l m m a m 0.13 (0.005) b m t dim min max min max inches millimeters a 9.40 10.16 0.370 0.400 b 6.10 6.60 0.240 0.260 c 3.94 4.45 0.155 0.175 d 0.38 0.51 0.015 0.020 f 1.02 1.78 0.040 0.070 g 2.54 bsc 0.100 bsc h 0.76 1.27 0.030 0.050 j 0.20 0.30 0.008 0.012 k 2.92 3.43 0.115 0.135 l 7.62 bsc 0.300 bsc m --- 10 --- 10 n 0.76 1.01 0.030 0.040
mc1455, mc1455b http://onsemi.com 10 package dimensions d suffix plastic package case 75107 (so8) issue w seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 x y g m y m 0.25 (0.010) z y m 0.25 (0.010) z s x s m
mc1455, mc1455b http://onsemi.com 11 notes
mc1455, mc1455b http://onsemi.com 12 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc1455/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada

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